Decreasing the dimensions of semiconductor devices and increasing the level of their integration are two of the major trends in the current semiconductor device manufacturing. As a result of these trends, the density of elements forming a semiconductor device continuously increases. The shrinkage of the semiconductor devices down to submicron dimensions requires that the routine fabrication of their elements also be performed on the submicron level. In addition, to increase the level of the device integration, semiconductor structures forming semiconductor devices may be stacked on top of each other. Typically, a three dimensional (3D) system refers to a system manufactured by stacking wafers, chips, or both and interconnecting them vertically using vias to achieve performance improvements at reduced power and smaller footprint than conventional two dimensional processes.
Generally, plasma etching is a form of plasma processing used to fabricate integrated circuits. It typically involves a high-speed stream of glow discharge (plasma) of an appropriate gas mixture being shot at a wafer. The plasma can contain ions, neutral atoms and radicals. Typically, a chip is fabricated using many layers of films. Each of these layers may be created using a mask that dictates the pattern of the layer. The accuracy of this pattern is extremely critical in manufacturing the chip. Generally, hard masks are used for etching deep, high aspect ratio (HAR) features that conventional photoresists cannot withstand. Typically, during the etching process free radicals react with the mask material and erode the mask. As a result, the mask integrity during the etching process is not maintained that negatively affects on the accuracy of the pattern crucial in the semiconductor chip manufacturing.
To maintain mask integrity conventional techniques to etch the HAR features use a thick stack of multiple hard mask layers. The conventional stack of hard mask layers lacks transparency so that the marks for mask alignment become invisible that affects the critical dimension controllability. Deposition and etching of the conventional hard masks require a long processing time that impacts the process efficiency and increases manufacturing cost.